PMC-BiSerial-BAE1
PMC Compatible Real Time Clock Interface




PMC-BiSerial-BAE1 Block Diagram



PMC-BiSerial-BAE1 Timing




The PMC-BiSerial-BAE1 implements the BAE Real Time Clock protocol. This protocol uses a 40 bit clock representation to keep multiple processes within a system in synchronization. The BAE1 can be programmed to be the master or a target within the system.
Please note that the PMC-BiSerial has been upgraded and the PMC-BiSerial-III is currently recommended for new designs

The PMC-BiSerial-BAE1 implements an RTC interface protocol. Two channels are supported. Either channel can be a master or a target. If one channel is selected for master and one for target loop-back testing can be accomplished.

The design concept is to have a local 40 bit counter which the software can access. As a target; the counter is updated by the broadcast RTC value. The external clock is used to update the local timer and the broadcast value. The local timer estimates the RTC between updates from the master source. The software assigns an ID to the targets. All messages contain the RTC, and all messages which pass parity checking are used to update the local counter. If the ID and Command match, the local programmed values the target will respond to are the master with either the ID and Command [health check] or a pre-programmed message.

If the BAE1 is programmed to be a master then the process is somewhat reversed. The local counter becomes the system master. The reference is selected to be the local oscillator. The clock is broadcast to the targets along with the RTC values. The master keeps the time and repeats the broadcast every 128 uS [with a 2 MHz reference]. If the Master wants to check on a target then a command is embedded into the start of the message with the Target ID and Command to send. The Target will append data to the end of the message with the ID/CMD repeated or new data depending on the system configuration.

New messages are started with a start bit which is set to 1. The next 8 bits are the ID [3] and Command[5]. 40 bits of RTC data follow. 5 parity bits which correspond to the 5 bytes of RTC data are next. The stop bit is 0. After the stop bit the master always releases the bus to allow the target to respond. If the master is not expecting a message then the message will be ignored. The sequence for the Target is turn-around, start = ´1´ 8 bits of data, turn-around, then the master resumes driving the bus. Each of the subgroups are transmitted MSB first. Parity is programmable.

The master will drive the bus with 0 between messages. The target uses a sequence of 64 0´s to determine that the next 1 is the start bit to protect against starting up mid-broadcast.

If the target does not detect a start bit, an error flag is set and the target retries to synchronize. If the target is enabled before the master this condition should be expected until the master is on-line.

If the target detects parity errors the RTC value is not updated into the local counter. A status error bit is set when the status error is detected. If the data was valid then a status bit is set when the counter is updated.

When the master sends a command, the send command bit is automatically cleared by the Master state machine. When the target response is captured a status bit is set to indicate that a new message is stored.

All status bits are held until explicitly cleared by the system software.

The PMC-BiSerial design has 20 IO available. The base requirements use 4 IO. The remaining IO are fully programmable and can be used to transmit or receive RS-485 data through a simple register interface. The IO are programmable in groups of 4 for transmit or receive and termination. Each IO is independent for data.

If your situation demands a custom application then we will update the Xilinx FPGA. Send us your timing and we will send you the interface.... email us your wish list or call today!

Order Information
PMC-BiSerial-BAE1 PMC BiSerial with BAE1 interface
PMC-BIS-Eng-Kit1..........Engineering Kit options for PMC-BiSerial-BAE1 include Board level Schematics [PDF], Driver and Reference Software [Win32 driver, Visual C reference files], HDEterm68-MP, HDEcabl68
PMC-BIS-Eng-Kit2...........Engineering Kit 1 plus PCI2PMC card.
Related: 68 position terminal strip to SCSI III connector adapter and BiSerial compatible SCSI III cable


You must have Adobe Acrobat to read our PDF files.

Hardware Manual: pmcbis_bae1_man_a2.pdf
Driver Manual: pmcbis_bae1_wdm_man.pdf


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