PCI-SpaceWire

  • Windows®, Linux, or VxWorks driver included with purchase
  • DMA on all channels
  • 4 channels each with 1 transmitter and 1 receiver. BK models 200 MHz rated.
  • Time Code support
  • Two SW models: Standard and the new enhanced BK version
  • 1 year warranty standard. Extended warranty available.
  • Extended Temperature standard.
  • ROHS and Standard processing available

PCI Compatible SpaceWire Interface

Utilize SpaceWire to communicate with the European Space Agency and NASA equipment utilizing the ECSS-E-ST-50-12C specification. SpaceWire is configured using routers to create a heirarchical point-to-point system with high speed parallel paths.

PCI SpaceWire implements SpaceWire in a convenient PCI format. With PCI the four channels fit on the PCI Bezel. The SpaceWire specification calls for LVDS signaling and a specific 9 pin micro-D connector. You can connect the PCI-SpaceWire to other SpaceWire compliant devices without electrical interface issues

Four fully independent and highly programmable LVDS IO channels are provided by the PCI-SpaceWire design. In the SpaceWire implementation the channels pass tokens between two independent state-machines to provide the proper protocol. The SpaceWire protocol is advanced with link testing, error handling, command and data protocols built in. The SpaceWire electrical interface is point-to-point. With the SpaceWire protocol it is easy to build a heirarchical architecture system with routers or a home-run wired system. Your equipment can interact with any other node in the system. PCI-SpaceWire provides a bridge from PCI <=> SpaceWire. Channel based DMA offloads your CPU and increases performance in your system. Time Code support provides a complete solution. Please refer to the manuals at the bottom of this page for detailed information

Each channel has FIFO memory with 4[K]/64K[BK] Kbytes TX and 4[K]/64K[BK] bytes RX standard with an option for an additional 512Kbytes. The FIFO´s are 32 bits wide to optimize data transfer from the PCI bus. The base FIFO´s are internal to the FPGA and utilize dual ported RAM configured as a FIFO. Two external positions are available for larger FIFO´s to be installed to support one of the channels in both directions or two of the channels in one direction.

The interface is optimized to minimize the latency on the PCI bus. The loop-back test can be used for BIT and for software development. The programmable FIFO flags are supported for interupt driven or polled operation. Programmable Almost Full, Programmable Almost Empty, plus Full, Half Full, and Empty. The programmable flags can be set to any debth to allow the software a programmable delay from event to empty or full. The interrupts can be very useful when sending or receiving messages larger than the FIFO size.

SpaceWire features automatic link testing when a node is brought on line - released for operation via software. The transmitter sends NULLs until NULLs are received and then sends FCTs until FCTs are received. The initial frequency is specified [ECSS-E-ST-50-12C] to be 10 MHz. Once the auto link test has passed, the hardware can switch to the programmed rate. A local oscillator is used to supply the 10 MHz reference clock for initialization. A programmable PLL is used to support operation once the link is established. The PLL is programmed via software and is referenced to the oscillator.

The SpaceWire protocol has flow control. The local memory on the PCI-SpaceWire will not overrun. In situations where the data being sent to the PCI-SpaceWire card is not buffered it is recommended to use a "-128" model with large FIFO´s on channel 0. The issue is upstream - if there is an unbuffered or under-buffered data source that will loose data if the link is throttled back the larger FIFO´s will help. The larger FIFO´s will provide more room to accumulate data if the system is not ready to allow the PCI-SpaceWire to DMA transfer it immediately. The DMA transfers are higher bandwidth than the SpaceWire transfers allowing the system to catch-up once the DMA transfers restart. At 100 MHz and 80% data transfer the 128x32 FIFO will provide about 52 mS of data storage. The host would have to ignore the PCI-SpaceWire interrupt requests for longer than 52 mS before throttling would occur. In most systems this is sufficient time to stay out of the throttled mode. To unload a full FIFO with DMA running it will take 128K/33M = .4mS => the unload to load multiplier is stongly in favor of the host side allowing the host to catch-up to the SpaceWire link once the delaying event has passed.

With the 10-2006-0103 PCB, PCI-SpaceWire has been updated to use a Spartan 6 FPGA. The revision "K" design has been ported to this FPGA and will be the default FLASH program going forward. New versions of the card will have an additional "-BK" Beyond K added to the part number to make sure orders for current systems are filled with compatible HW. New features are planned to make use of the new larger Industrial Temperature FPGA. All 10-2006-0103 and later boards will be Industrial Temperature as a standard feature. Features include larger internal FIFO´s, [planned]error injection, rearranged memory map to make room for additional features, wider counters and more options for interrupts. Please send in your requests for added features.

Model -BK is recommended for new projects and projects that want an upgrade. The K revision will continue to be available for any current projects. The new model has additional features and will be the platform being updated going forward.


PCI-SpaceWire is supported with the DESWBO Dynamic Engineering SpaceWire BreakOut tool for debugging SpaceWire systems, cables, and the DESWCB Dynamic Engineering SpaceWire Connector Board which provides a SpaceWire Cable to system cable interface.

If your situation demands a custom application then we will update the Xilinx FPGA. Send us your timing and we will send you the interface.... email us your wish list or call today!

PCI-SpaceWire Block Diagram

K model diagram shown



The standard timing uses the data and strobe to transmit and to receive the data. The data is transmitted as a command or data. The strobe provides the transitions for clocking when the data is unchanged between adjacent bit times.

PCI-SpaceWire Standard Timing




PCI-SpaceWire Features

  • Size
  • 1/2 length PCI

  • Transmit Speeds
  • 10 MHz initial rate per SpaceWire Specification. Software selectable secondary rate for transmit channel. Max. [K]frequency currently 180 Mhz. BK models rated at 200 MHz. Oscillator and programmable PLL combined for user frequency support.

  • PCI Speed
  • Standard 33 MHz. operation

  • PCI Access Width
  • Standard 32 bit operation supported.

  • Software Interface
  • PCI registers are read-writeable. Transmit and Receive functions separated.

  • Interrupts
  • Transmit and Receive state-machines, FIFO Programmable almost empty [transmit] and programmable almost full [receive] have programmable interrupts. Status can be polled for non-interrupt driven operation as well.

  • Signaling
  • LVDS interface devices are utilized.

  • IO
  • The IO is available via the PCI bezel connectors [4 channels]. The differential IO is properly routed with controlled spacing and matched lengths on each of the pairs. 9 Pin MDM connectors as specified in ECSS-E-ST-50-12C.

  • Interface
  • ECSS-E-ST-50-12C specification compliant. Time Code is supported.

  • Power
  • +5 only. 3.3V, 2.5V, 1.2V converted with on-board regulators.

  • Memory
  • Separate FIFOs are provided for TX and RX of each channel. Internal Block RAM creating [K]4K, [BK]64K is standard for all channels. 128K x 32 is available on channel 0. Add -128 to part number for this option.

  • DIP switch
  • An 8 position switch is available to allow for configuration control, multiple PCI SpaceWire in a chassis and to facilitate integration




    PCI SpaceWire Benefits

  • Speed
  • The PCI SpaceWire is optimized for serial interfacing requirements. The FIFO memories and programmable interrupts off-load the CPU from most of the management other implementations require. The FIFO access is optimized for the PCI bus further reducing overhead by speeding up the data transfer. On the IO side the PCI SpaceWire has independent and interconnected channel functions. All channels can operate at maximum rate in parallel.

  • Price
  • The PCI-SpaceWire is available off-the-shelf at a reasonable price. Custom versions can also be arranged. The PCI SpaceWire is easily programmed to implement new functions. Previously implemented "custom designs" are available too. Without the costs of schematic level design, layout, debugging etc. A modified SpaceWire will represent a large cost and time savings in your budget.

  • Ease of Use
  • PCI SpaceWire is easy to use. Point and shoot - just fill the FIFO and set the start bit to get your custom protocol transmitting. Built in loop-back capabilities and engineering kits help with integration into your system. Windows® Linux, and VxWorks® drivers available.

  • Availability
  • Dynamic Engineering works to keep the PCI SpaceWire in stock. Send in your order and in most cases have your hardware the next day. With a custom design a 1-2 week design period is usually required. We can support immediately with the std version then send updated FLASH later to help get your project going - right away.

  • Size
  • PCI SpaceWire is a standard ½ length PCI card and meets the PCI mechanical specifications. PCI SpaceWire can be used in all PCI slots.

  • PCI Compatibility
  • The PCI SpaceWire is PCI compliant per the 2.3 specification.



    PCI-SpaceWire Ordering Information
    1 year warranty
    Quantity discounts available


    PCI-SpaceWire - Standard version with 4Kb FIFO per channel, standard SpaceWire [ECSS-E-ST-50-12C] timing and protocol. Independent DMA channels and Timecode support. Four channels through the Bezel

    PCI-SpaceWire-128 - Standard version with 4Kb FIFO per channel plus 512K [128K x 32] FIFO´s added to channel 0 [TX and RX], standard SpaceWire [ECSS-E-ST-50-12C] timing and protocol. Independent DMA channels and Timecode support. Four channels through the Bezel

    PCI-SpaceWire-128RX - Standard version with 4Kb FIFO per channel plus 512K [128K x 32] FIFO´s added to channel 0 and 1 on RX, standard SpaceWire [ECSS-E-ST-50-12C] timing and protocol. Independent DMA channels and Timecode support. Four channels through the Bezel


    -BK - BK version with 64Kb FIFO per channel, standard SpaceWire [ECSS-E-ST-50-12C] timing and protocol. Independent DMA channels and Timecode support. Updated version recommended for new designs.

    -CC - add Conformal Coating
    -ROHS - add ROHS processing

    Please note that options can be combined for example "-128RX-BK" to gain large FIFO´s on the channel 0 and 1 RX, plus larger internal FIFO´s and otehr new or expanded features.

    Please select Engineering kit, driver and Development tool options below:


    Quantity


    Engineering Kits
    Dynamic Engineering provides Engineering Kits to help our customers have a successful and quick integration. Engineering Kits will save time and money with decreased T&I. The Engineering Kits are standardized in description to help with selection. The Engineering Kit is highly recommended for first time buyers. The kit pricing is discounted to encourage their use.

    PCI-SpaceWire-Eng .......... Integration Support Engineering Kit includes:
    Board level Schematics [PDF], and MDM-SpaceWire-Cable


    Software Support is included with your purchase. Current drivers are available for Windows [XP, 2000, etc. Win32 model, Windows7], VxWorks, and Linux kernel 3.0.0-17 [Ubuntu 11.10] 32 and 64 bit models [previous kernel versions also available.] Driver for
    TenAsys INtime real-time operating system also available. Please specify which driver package you need with your purchase order. All drivers come with a reference user application which includes loop-back testing, DMA use, PLL programming etc. Software and additional files provided with hardware purchase are intended for limited use only and are not intended for individual sale.


    Manuals
    SpaceWire Hardware and Software Manuals are located on the SpaceWire Summay page, covering board level design descriptions, bit maps, pinouts, operation, driver installation, calls, and use.

    Related Products
    MDM-Spacewire Cable: Lab Environment Spacewire Cable


    MDMSpacewire-Cable
    DESWCB custom cable to spacewire break out board


    PCI-SpaceWire Block Diagram with External FIFO Implemented

    SpaceWire Applications Information
    <b>rapid deploy </b> Spacewire Setup

    Portable Spacewire: White paper and product selection for low cost rapid deploy portable spacewire monitor and debugger. Provides nearly instantaneous around the world portable Spacewire solution. Download the full Spacewire_WhitePaper presented at the 2008 International Spacewire Conference.


    Custom designs
    Do you need to use SpaceWire in your system and don´t see a model that matches? The PMC-SpaceWire coupled with a PMC carrier will add SpaceWire to your system. Check the Carriers link on the top left of each page. For example a cPCI PMC carrier coupled with PMC SpaceWire will add SpaceWire to a Compact PCI system.


    Custom, IP, PMC, XMC, PCIe, PCI, cPCI, PC104p, PCIe104, VME, VPX Hardware, Software designed to your requirements



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