PC104p2PMC ( PCI-104 to PMC ) adapter / carrier converter card provides the ability to install a PMC card into a standard PCI-104 slot. Suitable for PCI operation with 32 bit data and 33 or 66 MHz bus operation.
The PCI bus is buffered with 10 ohm series resistors and clamped with Schottky diodes. The PC104p2PMC design is passive with no added delays to access the PMC hardware. The traces are carefully routed with proper attention paid to the impedance, and reference planes to maximize compatibility with your PCI-104 system. PC104p2PMC is based on the highly successful passive PCI and cPCI carriers:
cPCI.
An optional connector "P1" is available for user IO from the Pn4 connector of your PMC. P1 is located in the standard connector area for PCI-104. P1 is routed to Pn4 using differential traces with matched length, and 100 ohm impedance control. Suitable for differential and non-differential IO. The connector shield can be AC/DC or open based on a user shunt. P1 has 4 "extra" pins which are selectable between open, 3.3V and ground [in pairs]. The voltage reference can be handy for low power external devices, in line terminations and loop-back fixtures.
The PCI bus interconnected to the PMC is a 66 MHz capable layout.
PCI VIO is interconnected to the PMC directly. The PCI-104 backplane will determine the bus voltage reference. The voltage select pins are not installed on the PC104p2PMC, and it is left to the user to properly select the PMC and PCI104 stack components for PCI voltage level considerations. Many PMCs are "universal" and can work with 3.3 or 5V PCI stacks.
PC104p2PMC uses planes for power distribution between the PCI-104 stack connector and the PMC connectors [Pn1 and Pn2]. .1 uF 50V caps are provided at each of the PMC power pins plus an additional 10 uF cap on the power rails.
The stack position is selected with the dipswitch. The interrupt, IDSEL, Clock, Bus Request and Bus Grant are selected based on the stack position.
LED´s are provided for the system voltages.
PMC JTAG connections are routed to a header for use with PMC´s supporting JTAG programming. For example, most Dynamic Engineering PMC´s allow reprogramming the FPGA FLASH using the PMC JTAG FPGA connections.
If you have custom requirements please call or e-mail us with the details.